As electronic devices become more compact and multi-functional, and from the necessity of high-density mounting of electronic components, 3-dimensional mounting technology for mounting electronic components such as semiconductor devices in the stacking direction is being developed.
FIG. 21 shows a schematic cross-section view of a 3-dimensionally mounted semiconductor device of patent document 1. For example, in the 3-dimensionally mounted semiconductor device 121 disclosed in patent document 1, a second semiconductor device 114 is stacked on top of a first semiconductor device 112. Solder balls 118 that are formed on a first surface of the first semiconductor device 112 are electrically connected with a first flexible circuit board 113a and a second flexible circuit board 113b, where the first flexible circuit board 113a and second flexible circuit board 113b are bent along the first semiconductor device 112, and adhered to a second surface of the first semiconductor device 112. The second semiconductor device 114 is electrically connected to the first flexible circuit board 113a and second flexible circuit board 113b on the second surface of the first semiconductor device 112 via solder balls 119 on the first surface.
FIG. 22 shows a schematic cross-section view of a 3-dimensional semiconductor device of patent document 2. In the 3-dimensional semiconductor device 131 disclosed in patent document 2, a plurality of semiconductor package elements 132 are stacked and connected in multi stages. Each semiconductor package element 132 comprises a semiconductor device 133; a lead frame 135 that is connected to the semiconductor device 133 and that is made from a metallic foil that is bent in a right angle toward the side from the upper part of the semiconductor device; bumps 137 and pads 138 that connect the semiconductor device 133 and lead frame 135; an inner thermoplastic resin 134 that is provided between the inside of the lead frame 135 and the semiconductor device 133; and an outer thermoplastic resin 136 that is provided on the outside of the lead frame 135, with the lead frame 135 being exposed by forming opening sections 139 for the multi-stage connection being on both end sections on the upper surface of the outer thermoplastic resin 136. In the stacked structure, the edge surface of the lead frame 135 of the upper semiconductor package element 132 is connected to the exposed section of the lead frame 135 of the lower semiconductor package element 132 by using an electrical connecting material 140 that is coated on the opening section 139.    [Patent Document 1] U.S. Pat. No. 6,576,992    [Patent Document 2] Japanese Patent Kokai Publication No. JP-P2001-196504A